In current digital display systems using micromirror arrays or other similar spatial light modulators such as ferroelectric LCDs, each pixel of the array is individually addressable and switchable between an ON state and an OFF state. In the ON state, the micromirror reflects incident light so as to generate a “bright” pixel on a display target. In the OFF state, the micromirror reflects the incident light so as to generate a “dark” pixel on the display target. Grayscale images can be created by turning the micromirror on and off at a rate faster than the human eye can perceive, such that the pixel appears to have an intermediate intensity proportional to the fraction of the time when the micromirror is on. This method is generally referred to as pulse-width-modulation (PWM). Full-color images may be created by using the PWM method on separate SLMs for each primary color, or by a single SLM using a field-sequential color method.
For addressing and turning the micromirror on or off, each micromirror may be associated with a memory cell circuit that stores a bit of data that determines the ON or OFF state of the micromirror. In order to achieve various levels of perceived light intensity by human eyes using PWM, each pixel of a grayscale image is represented by a plurality of data bits. Each data bit is assigned significance. Each time the micromirror is addressed, the value of the data bit determines whether the addressed micromirror is on or off. The bit significance determines the duration of the micromirror's on or off period. The bits of the same significance from all pixels of the image are called a bitplane. If the elapsed time the micromirrors are left in the state corresponding to each bitplane is proportional to the relative bitplane significance, the micromirrors produce the desired grayscale image.
In practice, the memory cells associated with the micromirror array are loaded with a bitplane at each designated addressing time. During a frame period, a number of bitplanes are loaded into the memory cells for producing the grayscale image; wherein the number of bitplanes equals the predetermined number of data bits representing the image pixel.
The bitplane-by-bitplane formatted image data (hereafter, bitplane data), however, are not immediately available from peripheral image sources, such as a video camera, DVD/VCD player, TV/HDTV tuner, or PC video card, because the outputs (thus the input for the memory cells) of the image sources are usually either pixel-by-pixel formatted data (hereafter, pixel data), in which all bits of a single pixel are presented simultaneously, or standard analog signals that are digitized and transformed into pixel data. Pixel data is typically provided as a set of parallel signals, each of which carries a bit of different significance. All bits of a particular pixel are presented simultaneously across the set of signals. Successive pixels in the image are presented sequentially in time, typically synchronized with a pixel clock which is either provided by the image source or derived from other timing signals provided by the image source (such as horizontal- and vertical-sync signals). The pixel-by-pixel data format for the stream of video data is natural for non-PWM display technologies such as CRTs or analog LCDs, and has become the standard format for video data due to the historical dominance of these technologies. In order for PWM-based digital displays to interface with pixel-by-pixel formatted image sources, it is necessary to reformat the incoming video data (e.g. the pixel data) such that the bitplanes of the image can be stored and retrieved efficiently.
Therefore, methods and apparatus are desired for transforming a stream of pixel data into bitplane data.